As a result, PUFs can be deployed in every silicon system on earth, democratising hardware security even under tight cost constraints.”Ĭreation of self-concealing PUFs using innovative immersed-in-logic design Prof Alioto elaborated, “On-chip sensing, as well as machine learning and adaptation, allow us to raise the bar in chip security at significantly lower cost. The reduction in the cost of chip design and testing is key in enhancing hardware security even in very low-cost and low-power silicon systems, such as sensor nodes for the Internet of Things (IoT), wearable devices and implantable biomedical systems. This reduces the overall cost, shortens the time to market, and cuts down on system power to extend the battery lifetime,” shared Professor Massimo Alioto, who leads the Green IC Group that is behind this breakthrough in hardware security. The ability to self-heal without stability degradation over the entire chip’s lifetime assures reliable generation of secret keys at the highest level of security, while avoiding the burden of designing and testing for the very worst case, even if the latter is actually infrequent and unlikely. “Our approach utilises on-chip sensing and machine learning to enable accurate prediction, detection and adaptive suppression of PUF instability events. This eliminates overdesign and unnecessary design costs, as most of the testing effort can be delegated to the available on-chip sensing and intelligence throughout the device’s lifetime. In turn, the novel approach brings consumption back to the minimum possible, and is able to detect anomalous environmental conditions such as temperature, voltage or noise that are routinely exploited by hackers in physical attacks.Īn added benefit is that the traditional testing burden and cost are dramatically reduced by narrowing down the test cases required. This technique intelligently adjusts the tuneable level of correction to the minimum necessary, and produces a more secure, stable PUF output. To address the gaps, the team of NUS engineers introduced a novel adaptation technique that uses on-chip sensors and machine learning algorithms to predict and detect PUF instability. In addition, before proceeding to commercialisation, chips with unstable PUFs must first be identified and discarded through extensive testing on a very wide set of environmental conditions, further increasing cost. The instability is conventionally counteracted through overdesign, such as designing error-correcting codes margined for the very worst case, which substantially increases both chip cost and consumption. Often designed as stand-alone circuits, they provide hackers with obvious points of physical attacks on the chip. In spite of their remarkable evolution in the last decade, existing PUFs still suffer from limited stability and periodically incorrect fingerprint identification. The research team from NUS has taken silicon chip fingerprinting to the next level with two significant improvements: firstly, making PUFs self-healing and secondly, enabling them to self-conceal.
Such a technology prevents hardware piracy, chip counterfeiting and physical attacks.
Traditionally, PUFs are embedded in several commercial chips to uniquely distinguish one silicon chip from another by generating a secret key, similar to an individual fingerprint. This achievement elevates the level of hardware security even in low-end systems on chips. NUS researchers Prof Massimo Alioto (left) and Mr Sachin Taneja (right) testing the self-healing and self-concealing PUF for hardware securityĪ team of researchers from NUS Electrical and Computer Engineering has developed a novel technique that allows Physically Unclonable Functions (PUFs) to produce more secure, unique ‘fingerprint’ outputs at a very low cost.